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Design Verification Engineer

Design Verification Engineer

Thales
  • Posted 2 days ago
  • Be among the first 10 applicants

Job Description

We're Hiring: Technical Lead – Design Verification Engineers (SV-UVM & DO-254) to drive our transition to SV-UVM and champion DO-254 excellence — a role that blends deep technical execution with coaching and mentorship.

Thales India Engineering Competency Center (ECC), Bengaluru.

What you'll do:

Coach the team on SV-UVM best practices & advanced debugging

Architect & code UVM components (agents, scoreboards) and complex test scenarios

Verify communication interfaces & bus protocols (AXI4, SPI, PCIe, UART, ARINC 818/664)

Own end-to-end DO-254 verification (DAL A/B) with full requirement-to-test traceability

Lead technical estimation, planning & risk mitigation for the IVV scope

What we're looking for:

8+12 years in FPGA/ASIC Verification

Expert, hands-on SV-UVM practitioner

Strong knowledge of AXI4, PCIe, ARINC standards

DO-254 (DAL A/B) or ISO 26262 (ASIL-D) experience

Proficiency in Questasim/VCS/Xcelium/Rivera-PRO

Python/TCL scripting for automation

B.Tech/B.E or M.Tech in Electronics & Communication

Aerospace/Defense background is a plus

Join Thales and help build technology that makes the world safer, greener, and more connected.

If Interested Please drop you resume to [Confidential Information]

More Info

Key Skills

Xcelium

Questasim

SV-UVM

Rivera-PRO

AXI4

DO-254

About Company

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