Design Verification Engineer

Certainly! Here's a comprehensive job description for a Design Verification Engineer: Are you interested Join us and explore competitive salary ranges up to $5000!

Competitive salaryup to $5,000/month + Performance bonus + Year end bonus + Flexible work options

Why Join Us

- Premium PVI health insurance (for you & family)

- Annual health check-up at Vinmec

-13th-month salary & performance-based bonus

- Birthday gift & celebrations

- Company trip & regular team bonding

- Work with global experts from top-tier tech companies

Design Verification Engineer Job Description

A Design Verification Engineer plays a critical role in ensuring the functionality and correctness of complex hardware or software designs. They collaborate closely with design engineers to verify that the final product meets requirements and specifications. Below are the key duties, responsibilities, and qualifications for this role:

Duties & Responsibilities:

• Test Plan Development: Design and develop test plans based on design specifications. These plans outline the verification strategy and ensure comprehensive coverage.
• Test Execution: Execute tests using simulation tools, emulation platforms, or FPGA prototypes. Verify the functionality of digital circuits, IPs, or entire SoCs.
• Issue Resolution: Identify and resolve issues found during testing. Debug failures, analyze waveforms, and work closely with design teams to address any discrepancies.
• Coverage Analysis: Analyze coverage metrics (functional, code, and assertion coverage) to ensure thorough verification. Close coverage gaps by creating additional test scenarios.
• Formal Verification: Apply formal methods to verify specific properties of the design. Use assertion-based techniques and formal tools.
• Regression Testing: Run regression tests to validate design changes and track progress. Maintain regression suites and automate test execution.
• Documentation: Document test plans, results, and verification methodologies. Create clear and concise reports for design teams and management.
• Collaboration: Collaborate with cross-functional teams, including design, architecture, and software, to ensure seamless integration and verification.

Qualifications:

Education: A relevant degree (Bachelor's or Master's) in Electrical Engineering, Computer Science, or a related field.

Skills:

Proficiency in hardware description languages (Verilog or SystemVerilog).

Familiarity with UVM (Universal Verification Methodology) or other verification methodologies.

Knowledge of scripting languages (such as Perl, Python, or TCL).

Understanding of industry-standard interfaces (e.g., PCIe, USB, DDR).

Familiar with CDNS EDA tool for Design Verification

Location

Our startup is based in SHTP, Ho Chi Minh City, Vietnam. We offer flexible work arrangements if necessary, including remote options.

For further information & career opportunities:

Email: [Confidential Information]

Phone: (+84) 989800054

Website: www.hyphendeux.com