About the Role
At Faraday, we design world-class ASIC/SoC solutions that power the future of high-performance computing, AI, and connected devices. As a Senior DFT Engineer, you will take ownership of design-for-test (DFT) strategy and implementation for complex SoC projects, ensuring robust testability, high coverage, and smooth silicon bring-up.
This is a senior-level role where you will lead technical execution, collaborate with cross-functional global teams, and mentor junior engineersdirectly contributing to first-pass silicon success and Faraday's mission of engineering excellence.
Key Responsibilities
- Define and implement DFT architecture and strategy for ASIC/SoC projects.
- Own scan insertion, boundary scan (JTAG), MBIST, LBIST, ATPG, and test compression flow.
- Perform DFT verification (pre-silicon gate-level simulation, post-silicon debug, failure analysis).
- Collaborate closely with RTL, DV, STA, and Physical Design teams to ensure seamless integration of DFT features.
- Analyze silicon test results, diagnose yield issues, and support production test teams.
- Enhance automation scripts and improve DFT methodology using industry-standard EDA tools (Synopsys DFTMAX, Cadence Modus, Mentor Tessent).
- Mentor and guide junior engineers, sharing best practices and technical knowledge.
Qualifications
- Bachelor's or Master's in Electrical Engineering, Computer Engineering, or related field.
- 8+ years of hands-on DFT experience in ASIC/SoC projects.
- Expertise in scan, ATPG, MBIST, LBIST, boundary scan/JTAG, and DFT sign-off metrics (fault coverage, pattern count, test time).
- Strong skills in Verilog/VHDL and scripting languages (TCL, Python, Perl, Shell).
- Familiarity with ATE (Advantest, Teradyne) and silicon bring-up flows is a plus.
- Solid understanding of timing closure (STA), ECOs, and physical design constraints.
Attributes for Success
- Strong problem-solving and debugging mindset with attention to detail.
- Ability to lead and influence across functions and geographies.
- Passion for mentoring and growing engineering talent.
- Effective communicator who thrives in a collaborative, global team environment.
- Growth mindset and adaptability in fast-moving design cycles.
Why Join Faraday
- Work on cutting-edge SoC projects across AI, HPC, automotive, and networking domains.
- Collaborate with global engineering experts and leading customers worldwide.
- Shape the DFT methodology for advanced nodes (7nm/5nm and beyond).
- Thrive in a culture of diversity, synergy, passion, and precision.
- Grow your career in a company committed to being a Great Place to Work and the employer of choice in IC design.
Inclusive Note: We know that not everyone matches all requirements. If you're passionate about DFT, have strong relevant experience, and want to grow with us, we encourage you to apply.
