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SENIOR ASIC DESIGN & VERIFICATION ENGINEER (IP/SoC)

  • Posted 7 months ago
  • Be among the first 10 applicants

Job Description

GENERAL SUMMARY:

As a leading technology innovator in Vietnam, FPT is expanding into new frontiers, including the IC Design market. We are seeking brilliant engineers with excellent analytical and technical skills to join our Infrastructure organization.

This is a prime opportunity to join a fast-paced SoC team responsible for high-performance ASICs, enabling AI acceleration in smart camera designs with optimized TOPs/Watt efficiency.

We are hiring for multiple key positions to build IP and System-On-Chip (SoC) for Edge AI applications:

  1. ASIC / RTL Design Engineer
  2. Design Verification Engineer
  3. Analog & Mixed-Signal Engineer

1 POSITION: SENIOR ASIC / RTL DESIGN ENGINEER

JOB DESCRIPTION:

  • Define micro-architecture and perform RTL coding (Verilog/SystemVerilog) for complex SoC blocks and Sub-systems.
  • Handle IP integration for SoC top-level including IO/PAD-ring, Clock/Reset distribution, and Power Management.
  • Perform front-end implementation flows: Logic Synthesis, Static Timing Analysis (STA), and logic equivalence checks.
  • Ensure design quality through rigorous Linting, CDC (Clock Domain Crossing), and RDC checks.
  • Implement low-power design techniques (Clock gating, Power gating) and develop Power Intent (UPF).

REQUESTED SKILLS:

  • Bachelor's/Master's degree in Electrical/Computer Engineering.
  • 3+ years of experience in ASIC/RTL Design.
  • Strong expertise in Verilog/SystemVerilog and Digital Logic Design.
  • Experience with EDA tools (Synopsys Design Compiler, SpyGlass, or Cadence Genus/Hal).
  • Knowledge of AMBA Bus (AXI/AHB/APB) and Low Power Design (UPF) is a strong plus.

2 POSITION: SENIOR DESIGN VERIFICATION ENGINEER

JOB DESCRIPTION:

  • Develop verification plans and build robust testbench environments using SystemVerilog and UVM.
  • Perform functional verification for IPs and SoC Sub-systems to ensure zero-bug designs before tape-out.
  • Develop test cases, assertions (SVA), and functional coverage models.
  • Run simulations, analyze regressions, and debug failures in collaboration with the RTL design team.
  • Validate performance and power efficiency scenarios.

REQUESTED SKILLS:

  • Bachelor's/Master's degree in Electrical/Computer Engineering.
  • 3+ years of experience in Pre-silicon Verification.
  • Deep knowledge of UVM methodology and OOP (Object Oriented Programming).
  • Proficiency with simulators: QuestaSim, VCS, or Xcelium.
  • Experience with Scripting (Python/Perl/Tcl) for automation is preferred.

3 POSITION: ANALOG & MIXED-SIGNAL ENGINEER

JOB DESCRIPTION:

  • Design and simulate Analog/Mixed-Signal circuits such as ADC, DAC, PLL, LDO, Bandgap, SerDes, and High-speed I/O.
  • Perform schematic capture and run simulations across PVT corners using Cadence Virtuoso/Spectre.
  • Work closely with the Layout team to ensure matching, shielding, and minimize parasitic effects.
  • Conduct post-layout simulation and reliability analysis.
  • Collaborate with the Digital team for Mixed-Signal integration and behavioral modeling.

REQUESTED SKILLS:

  • Bachelor's/Master's degree in Electronics/Physics/Semiconductor.
  • 3+ years of experience in Analog Circuit Design (CMOS/FinFET technologies).
  • Proficiency in Cadence Virtuoso, Spectre, HSpice, ADEXL.
  • Strong understanding of device physics, feedback theory, and signal integrity.

OUR OFFER:

  • This role will give you ownership of all aspects of design and development of large SoCs, SoC blocks and sub-systems. Handle internal/external IP integration and build sophisticated sub-systems.
  • Work on cutting-edge projects in ASIC design and verification.
  • Work closely with Chip Architecture, Design Verification, Physical Design, DFT and power teams to achieve SoC tapeout goals on schedule.
  • Collaboration with a dynamic and experienced team of experts.
  • Develop and maintain methodology/flows/checks for your design.
  • Work with multi-disciplinary groups to make sure designs are delivered on time and with the highest quality by incorporating accurate checks at every stage of the design process.
  • Competitive Compensation: Attractive salary package, 13th-month salary, performance bonuses, vacation bonuses, etc.
  • Compliance: Full benefits and social insurance according to Vietnam's Labor Law.
  • Premium Corporate Welfare:
  • FPT Care: Exclusive premium health insurance package (free medical examination and treatment at top international/private hospitals).
  • Annual periodic health check-ups.
  • Various gratitude activities taking care of employees and their families spiritual lives.
  • Work Environment:
  • Friendly, open, and professional working environment.
  • Modern facilities and high-quality work equipment.
  • Unique and vibrant corporate culture with exciting activities: New hire welcome, Teambuilding, Traditional festivals, Talent shows (Sao Choi), FPT Birthday, March 8th, November 11th, etc.
  • Career Growth: Numerous opportunities for promotion and technical development.
  • Internal Discounts: Special rates when using services from FPT Telecom/FPT ecosystem.

HOW TO APPLY:

  • Send your CV to: [Your Email Here]
  • Subject: [Position Name] - [Full Name]

#SoCDesign #ASICDesign #RTLDesign #SystemVerilog #Verilog #LowPowerDesign #UPF #DFT #Synthesis #StaticTimingAnalysis #STA #EdgeAI #HardwareEngineering #Semiconductor #ChipDesign #DigitalDesign #Analog&Mixed-SignalDesign

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Job ID: 140202359

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