We Are:
At Synopsys, we drive innovations shaping how we live and connect. Our technology leads in chip design, verification, and IP integration, powering high-performance silicon chips and software. Join us to transform the future through continuous innovation.
You Are:
You are an experienced engineer with deep expertise in RTL and synthesis. You enjoy working with cross-functional teams, solving technical challenges, and mentoring others. You're self-motivated, responsible, and eager to advance in a fast-paced environment.
What You'll Be Doing:
- Architect and develop RTL for high bandwidth PHY IP and test chips.
- Define synthesis constraints, resolve STA and simulation issues.
- Collaborate with verification, controller, and lab teams.
- Perform logical and physical synthesis, formal verification, and quality checks.
- Analyze timing violations and generate reports.
- Mentor junior engineers and support digital flow development.
The Impact You Will Have:
- Enable innovative IP solutions for global customers.
- Improve product reliability and efficiency.
- Accelerate development cycles with strong teamwork.
- Mentor and develop technical talent.
- Resolve customer technical challenges.
- Shape industry standards in chip design and IP integration.
What You'll Need:
- BS/MS/PhD in Electronics Engineering or related field.
- 2:6+ years RTL design and synthesis experience.
- Expertise in industry tools (VCS, Verdi, Spyglass, Synopsys sign-off).
- Strong scripting skills (Perl, tcl, Python, Shell).
- Good English communication skills.
Who You Are:
- Responsible, result-oriented, and proactive.
- Enthusiastic about technology and problem solving.
- Collaborative and clear communicator.
- Adaptable and willing to mentor others.
