Design Verification, Senior Staff Engineer

About Marvell

Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

Infrastructure Processor Business Unit, a part of Networking and Processor Business Group, encompasses OCTEON and the award-winning OCTEON Fusion-M product families. The SoC family of multi-core CPU processors and Radio Access SoCs offer best-in-class performance, low power, rich software ecosystem, virtualization features, and open source application support with highly optimized custom ARM CPU cores providing an excellent solution for a highly flexible end-to-end optimized 5G platform.

As part of the Infrastructure Processor unit at Marvell, you will verify all of the circuitry that goes inside our chips for the general market and for specific customers. These chips use cutting-edge technology to facilitate data transfers at high speeds, and you will help verify that each design meets our customers specifications whether they're a major telecom organization or automotive company, etc.

What You Can Expect

• Develop and implement verification plans for read channel storage IP designs.
• Create and maintain testbenches using industry-standard verification tools and methodologies.
• Perform functional and performance verification of complex digital designs.
• Collaborate with design and architecture teams to identify and resolve design issues.
• Analyze and debug simulation failures and provide detailed reports on verification results.
• . Mentor and guide junior verification engineers

What We're Looking For

• BS/MS/PhD Degree in Electrical Engineering / Computer Engineering / Electronics and Telecommunications Engineering, or a related field.
• Proficiency in verification languages such as SystemVerilog, UVM, and scripting languages (Python, Perl, etc.).
• Understanding of ASIC design flow, strong understanding of digital design and verification methodologies.
• Experience with industry-standard EDA tools (e.g., Cadence, Synopsys, Mentor Graphics).
• Strong mathematical skills.
• Experience with Digital Signal Processing (DSP) and knowledge of DSP modeling in C/C++.
• Strong problem-solving skills.
• Fluent in English language, excellent communication skills

Additional Compensation and Benefit Elements

• Competitive salary, plus 13th-month salary and performance-based bonus

• RSUs (Restricted Stock Units) for new joiners and on-going annually

• Premium health & accident insurance for you and your family (spouse and children)

• Annual medical check-up at a designated hospital arranged by Marvell

• Generous paid leave policies: 15 annual leave days, 3 Recharge periods per year (company-wide off-work from Friday to Monday), 5 paid sick leave days, 3 days of volunteer time-off and 11 public holidays

• Exciting Employee Events: Participate in fun activities throughout the year such as team birthdays, sports tournaments, company trips, mid-autumn, appreciation week, charity, health seminars, year-end party, and more.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

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