M t cng vic:
(Mc lng: n 20 triu VN)
Input the specifications requested by the customer, and carry out specific design verification work using the following languages.
Function specifications (English)
Mounting specifications (English)
RTL (Verilog/SystemVerilog) or high-level synthesis (SystemC/C/C++)
Verification strategy (English)
Verification item table (English)
Verification environment construction/verification scenario (SystemVerilog/SVA/UVM/C)
Verification environment manual (English)
Verification result report (English)
Chc v: Nhn Vin/Chuyn Vin
Hnh thc lm vic: Ton thi gian
Quyn li c hng:
Raise in salary (April)
Bonus 3 times (Summer, Winter, Tet bonus) 3 months bonus
Position allowance
IT Admin allowance(1,500,000VND/month)
Lunch allowance(1,000,000VND/month)
Yu cu bng cp (ti thiu): i Hc
Yu cu cng vic:
+3 years experience for same position
Skill for Verilog
Skill for System Verilog
Skill for Synopsys or Cadence
Yu cu gii tnh: Nam/N
Ngnh ngh: CNTT - Phn Cng,CNTT - Phn Mm,Data Analytics,Phn Cng My Tnh/in Thoi
i Hc
3 - 5 nm
