Analog Layout Engineer

We're looking for an Analog Layout Engineer to join the team.

* About the role

You will be responsible for the layout of challenging analog modules in our SoCs. You will be working closely with other teams (system, analog design, digital physical design, and packaging) on a daily basis to create life-changing SoCs for biomedical applications. You will get involved in the whole IC design flow, from ideas to silicon. You will see the chips designed by you in real-life products.

You should be a motivated person with a can-do spirit and a keenness to work in an Aussie start-up culture. Nanochap's motto is Anything can be explained - Any issue can be resolved, you will be trained to be an expert in your field of expertise. You do something because you fully understand it, you make a decision because you have enough data backing it.

Nanochap provides a work environment that promotes employee growth and development. We are searching for an individual who wants to grow with the company and will strive to improve performance. If you are driven, personable, and energetic, there will be additional opportunities for you here at Nanochap.

* Where you will sit

19th Floor, TTC Building, 253 Hoang Van Thu, Tan Son Hoa Ward, Ho Chi Minh city.

* What you will do

Perform layout for analog circuits/modules/top for our low-power low-noise high performance bio-medical SoCs, including but not limited to voltage regulators, Capless LDOs, DC-DC converters, bandgap references, oscillators, PLLs, Op Amps, TIA, filters, ADCs, DACs, high voltage DCDC boosters, high voltage drivers, LVDS's, etc.

Floor planning, power design, signal routing strategy, EMIR awareness, parasitic optimization for layout blocks from schematics.

Understand and apply Analog Layout techniques to ensure design meet performance with minimum area and high yield.

Perform layout verification: DRC/LVS/ERC/ANT/DFM

Perform PERC verification: ESD/LUP checks

Participate in building and enhancing layout flow for faster, higher quality design process.

Complete all design quality checks and data quality checks

Work with digital physical designers to integrate analog layouts into top level.

Collaborate in package design (interposer design, RDL design)

Work closely with cross-functional teams, including system architects, analog designers, physical design engineer, and test/packaging engineers, to ensure successful integration of analog circuits into the SoCs.

Create clear documentation of design & product development activities to ensure high quality designs & to support dissemination of important design information to cross-functional teams

Be willing to take different roles in different projects as needed for project success

Coach junior engineers in the team.

* What we need from you

At least 3 years of Analog/Custom Layout experience, from module level to top chip integration.

Understand MOSFET/FinFET fundamentals and passionate about IC design

Experienced with Layout design and verification EDA tools.

Understand basic semiconductor fabrication processes.

Understand layout techniques for high speed, matching, ESD, Latchup, Antenna, EMIR.

Experienced with writing layout review presentations and layout verification reports.

Strong analytical and problem-solving skills, with the ability to debug complex issues.

Motivated to carry out a wide variety of tasks with clear communication and presentation skills in a dynamic team environment.

Good English communication skills and presentation skills, with an ability to think and communicate at different levels of abstraction.

And last but not least, an eagerness to contribute to creating life-changing silicon chips.

* What we offer

Competitive Salary Package.

13th month salary, plus performance-review bonus.

Company stock options.

Overseas opportunities: Short-term or Long-term working in Melbourne, Australia.

Additional private family health insurance.

Technical sharing, Mentoring program.

Company trip, Year-end party, Team building activities, etc.

* Who we are and what we do

Nanochap is a Pioneer in Neural Interface Technology. We are designing and commercialising complete SoCs for biomedical applications such as brain-computer interface, electrical neural stimulation, DNA sequencing, high-speed data acquisition for medical imaging equipment, EEG/ECG/EMG/PPG signal sensing and processing, implantable electronics and prostheses. We design every chip from ideas to mass production as well as mass testing, firmware bring-up, and end-product support.

At Nanochap, the team are working on full design flow for a typical IC, including but not limited to System design, RTL design, Analog design, Digital verification, Analog Layout, Digital Implementation, Physical Design, Mixed-signal design and verification, Full-chip integration and layout, GDS sign-off, IC packaging, Chip testing and firmware bring-up, end-product support.

We specialise in ultra-low noise, ultra-low power analog designs, PMU designs, high voltage DC-DC boosters, as well as smart and sophisticated digital modules, and digital signal processing. We integrate ARM and RISC-V MCUs in our SoCs, together with popular peripherals. For every chip, we integrate Analog to Digital converters, such as high-speed pipelined ADC, SAR ADC, high-resolution Sigma-Delta ADC. High frequency modules are also designed and used in our chip such as PLL, LVDS, ASK/LSK modulation/demodulation, inductive-link power/data transfer.

Nanochap was founded by two PhD alumni of The University of Melbourne, Australia. Our offices are in Hangzhou, Shanghai, Shenzhen, Melbourne, and Ho Chi Minh, in which Melbourne hosts our core R&D team.

At Ho Chi Minh office, we are looking for talented IC design engineers with at least 5 years of experience. Each position will work closely with our core R&D team in Melbourne, so there is huge potential for personal development in technical skills & knowledge, communication skills, and especially problem solving skills and logical thinking.

If you are passionate about analog/custom layout and have a proven track record in low-noise low-power high-frequency layout works, we would love to hear from you.

You can apply directly here or email to [Confidential Information] or [HIDDEN TEXT]