cadence schematic capture , Hspice, high-speed custom digital design flows, AMs, Cadence Virtuoso, Spectre

temperature sensors , bandgap references , DNL, ADEXL, op-amps, INL, biasing circuits, Layout XL, THD, precision analog circuits, CMOS technologies, DC operating point, noise, Stability, LDOs, mixed-signal circuit design, AMs, Cadence Virtuoso suite, Spectre, Sigma-Delta converters, Schematic Maestro, AC simulations, frequency response, ip development, mismatch analysis

Matlab, Worst case identification, Monte Carlo analysis, Physical layout management, AMs, Analog Circuit Design, Spectre, Cadence tool set, Top level simulation, Simplis, Post layout parasitic extraction, Schematic generation and simulation, Top level verification, Knowledge of device physics and process technologies, Block level modelling, Simulation data analysis, IC transistor level implementation, IC system partitioning and architectural tradeoff analysis, Power IC design, Signal grounding and routing tradeoffs, Die area optimization

transistor-level design and simulation, PEX, post-layout verification, LVS, noise analysis, Analog Circuit Design, Spectre, advanced CMOS technology nodes, DRC, layout sensitivity, linearity matching, mixed-signal IC design, Cadence Virtuoso