Verilog, C, Mac, formal verification, Ethernet Protocol, mixed-signal co-simulation, systemverilog, PHY, Ethernet switch

C, Python, BUS Performance, SoC TB Emulation, DFT GLS, NPU AI Accelerator, DRAM, Uvm, CoreSight Debugger, systemverilog, Chiplet OCA

Perl, Tcl, Verilog, Oop, Vcs, Digital Logic Design, Python, EDA Tools, systemverilog, Xcelium, AHB, low power design, Cadence Virtuoso, ADEXL, APB, Axi, Uvm, UPF, Cadence Genus, Spectre, Hspice, AMBA Bus, QuestaSim, Synopsys Design Compiler, spyglass