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About the Role:

GTC Informatics Private Limited is hiring experienced RTL Design Engineers for semiconductor design projects across India. These positions are open on both a full-time and contract basis, depending on client and project requirements. Experienced candidates who can join quickly are encouraged to apply.

Location : PAN INDIA

Roles & Responsibilities:

Work on micro-architecture and RTL coding of IP blocks and subsystems
Write clean, synthesizable RTL using Verilog/SystemVerilog
Run lint, CDC and RDC checks and fix issues
Support synthesis and timing closure with physical design teams
Work with verification teams to debug and close design issues
Prepare design documents and specifications

Required Skills & Experience:

4–10 years of experience in RTL design for ASIC/SoC
Strong hands-on skills in Verilog and SystemVerilog
Experience with lint and CDC tools such as Spyglass
Good understanding of synthesis, STA and timing constraints (SDC)
Knowledge of protocols such as AXI, AHB, APB or PCIe
Good debugging and communication skills

Good to Have:

PCIe or high-speed interface design experience
Low-power design knowledge (UPF/CPF)
Scripting skills in Python, Perl or Tcl

How to Apply:

Apply through Foundit, or send your updated resume to [HIDDEN TEXT]

Email subject: RTL Design Engineer | Total Experience | Current Location

(Example: RTL Design Engineer | 6 Years | Bengaluru)