Ovm, System Verilog, AMBA AXI, Uvm, CHI protocols

Coding, Test Case Development, Ovm, Scripting, ASIC SoC life cycle, Execution, Verification closure, Regressions coverage analysis, Uvm, Bug analysis, Gate level simulations

assertion based verification , Debugging Tools, Scripting Languages, systemverilog, Uvm, Testbench Development, FPGA Prototyping, coverage analysis, Design Simulation, Design Verification, Asic verification, SoC Verification