redhawk , Tcl Scripting, Python Scripting, Innovus, StarRC, EMIR analysis, ICC2, Voltus

Cursor, Python, Tcl, Synthesis, standard place-and-route flows, Codex, Cadence Innovus, Claude, Place And Route, AI technologies, tool-specific scripting, RTL-to-GDSII flow, layout closure, timing convergence, AI concepts, design implementation, Physical Design, Synopsys ICC2, Clock Tree Synthesis

Tcl Scripting, EDA timing tool competence, primetime, spyglass, Tweaker, Fishtail, SDC knowledge, GCA, Synopsys Design Compiler, DMSA

Tcl Scripting, EDA timing tool competence, primetime, spyglass, Tweaker, Fishtail, SDC knowledge, GCA, Synopsys Design Compiler, DMSA

Continuous integration (CI), Gerrit, Test Methodologies, Git, Test automation, Perl, Version Control Systems, Verilog, Shell scripting, Python, Tcl, Logic composition, SOC design, Memory BIST, Gate-level netlist, Digital circuit fundamentals, Artificial intelligence techniques for model development, systemverilog, Software engineering guidelines, ASIC front-end design methodologies, Low-power design methodologies