Soc, Verilog, Bus architectures, Logic synthesis for RTL code performance and power, Tape outs and bring up support, systemverilog, RTL design concepts, Memory hierarchies, Digital logic design principles, Accelerators, Processor design, Design implementation and integration of chassis subsystems, Arithmetic units, Low-power design

Paas, Saas, Iaas, Data Modeling, Sql, Spark, Dataproc, DataFlow, Python, Etl, Google cloud services, Google BigQuery, data Lakehouse architecture, Google Data Analytics services