perl scripting, python, Tcl, Sta, PNR, power integrity analysis tool, Synopsys Redhawk SC, EM IR and PDN domain, Cadence Voltus

static timing analysis, Perl, Python, EDA tools for synthesis, LINT, cdc, digital design principles, verification methodologies, RTL design using Verilog, clocking resets, Simulation, Timing Analysis, RTL quality tools such as Spyglass, RDC, VHDL, low-power design techniques

Excel, Python, Ms Word

C, JIRA, Rust, UDP, Tcp, Embedded Software Development, Wireshark, Jtag, Git, IoT solution development, Ip, Go, SWD debuggers, MicroPython, edge computing, MS Azure IoT, telemetry and device management systems, device-to-cloud communication solutions, AWS IoT