Perl, Python, Tcl, Logic Synthesis, Physical-Aware Synthesis, PPA optimization, UPF management, Low-Power Implementation, systemverilog

Perl, Python, Tcl, FineSim, Hspice, CTS, POCV concepts, primetime, Monte Carlo analysis, STA tools, cross-talk, STA fundamentals, ICC2, Tempus, Spice simulations, Signal Integrity, Innovus, Timing Constraints, Parasitic Extraction, noise, ASIC back-end flows, AOCV

Apis, Node.js, Microservices, Angular, Testing Frameworks, Typescript, Javascript, System Design, CI CD, service-oriented architecture, Object-Oriented Design, observability

Usb, Networking, Nvme, Storage, Graphics and Display, Python automation frameworks, Root Cause Analysis, Platform Validation, Post Silicon Validation, Platform Debug, System Debug, Platform security, RAS technologies, Windows platform debugging, Validation infrastructure development, PCIe Gen4 Gen5, Silicon-to-system interactions, DDR4 DDR5 Memory

Java, Scala, Distributed Systems, Python, Go, Backend Systems Infrastructure

Schematic design, MATLAB, Python, Synopsys Custom Compiler, BERTs, Spectre, Hspice, Cadence Virtuoso, Layout interaction, behavioral modeling, Lab measurements, BER estimation, High-speed oscilloscopes, Post-layout verification, Design sign-off, Jitter budgeting, Parasitic Extraction, Silicon bring-up

Github, virtualization, OpenStack, Dns, Firewalls, routing, DHCP, Gcp, Terraform, shell scripting, Ansible, Pure Storage, Azure, Python, Kubernetes, AWS, networking fundamentals, Linux systems administration, Dell PowerStore, Infrastructure-as-Code