Test Case Creation, Ethernet, Scripting, gate-level simulations, coverage analysis, ASIC SoC development lifecycle, OVM UVM methodologies, CSI2, testbench development, UCIe, systemverilog, coding execution, verification sign-off, AMBA, regression runs, PCIe Gen3 4 5, DDR4 5, USB3, bug investigation, I3C, full-chip test plans