mixed-signal IC design, AMS verification methodology, photonic-adjacent driver design, data converters, advanced CMOS, Cadence Virtuoso, Spectre

High-speed SERDES IO PHY Layout design, Signal integrity issues, Analog IO design principles, Automated PnR, Block PnR, CMOS and FinFET technologies

Vdc, ADC, Charge pump, density, Antenna, noise fixes, Vlsi Design, custom analog layout design, Virtuoso XL, EDA Tools, RV high voltage flows, LDO, scripting skills, layout validation, Circuit Design, DRCs

clocking , power integrity , AMS behavioral modeling, PLLs, TX RX circuits, High-speed IO design, Analog mixed-signal IC design, Co-simulation, equalization, DLLs, Jitter optimization, System-level modeling, Signal Integrity, Jitter noise and channel effects