routing, IC backend flow, APR flow, floor-planning, Pv, Physical design flow, Placement, CTS, Sta

EDA tool chain - FusionCompiler, Shell, Perl, Python, Tcl, Hold Setup Requirement, floorplanning, Signoff Checks, IP integration, Make flow, Timing Fixture, Synthesis, Physical Verification, Power Intent spec and checks, Extraction, script programming, DRV checks, Tk, Physical Design Implementation, Place And Route, Clock Tree Synthesis