prevalent standards Protocols viz. PCIe Gen3 4 5 USB3 DDR4 5 Ethernet CSI2 I3C AMBA, Scripting, bug analysis, Verification closure, Full chip test plan development modification, Regressions coverage analysis, OVM UVM methodologies using SV, ASIC SoC life cycle, Testbench development modification, Gate level simulations, Test case development coding execution

Mac, C, Verilog, formal verification, PHY, Ethernet Protocol, Ethernet switch, mixed-signal co-simulation, systemverilog

C, Verilog, Python, Perl, Linux, Uvm, systemverilog