hardware description language , C, Nvme, PERL, Pcie, Verilog, Python, Tcl, scripting programming language, On-Chip bus protocols, UVM based test bench, systemverilog, Rtl Design, Timing Closure, Axi, APB, UAlink, CXL, coverage closure analysis, AHB, Lint CDC check

hardware description language , Nvme, Verilog, Tcl, Python, PERL, Pcie, CXL, Timing Closure, systemverilog, UVM based test bench, scripting programming language, Rtl Design, Lint CDC check, coverage closure analysis, AHB, UA link, On-Chip bus protocols, APB, Axi