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Showing 2 jobs
Skills:
rtl development , Dsp, static timing analysis, Perl, Verilog, Unix Shell, Matlab, System Verilog, fec, chip bring up, functional validation, Functional Verification
Skills:
rtl development , System Verilog, Dsp, Verilog, static timing analysis, Matlab, Perl, Pcie, Unix Shell, UCIe, Functional Verification, fec, Vlsi Design
