At Marvell, we believe that infrastructure powers progress. That execution is as essential as innovation. That better collaboration builds better technology. Trusted by the world's leading technology companies for 25 years, we move, store, process and secure the world's data with semiconductor solutions designed for our customers current needs and future ambitions. Through a process of deep collaboration and transparency, we're ultimately changing the way tomorrow's enterprise, cloud, automotive, and carrier architectures transform-for the better.
The data infrastructure that our customers build has never been more critical to our global economy. It's what's keeping the world connected, businesses running, and information flowing. If you're ready to excel, innovate, and truly enjoy your work, apply now for the position detailed below.The Opportunity
Support all BU from netlist to GDSJob Responsibilities:
As member of central physical design team, you will provide backend design service for multiple Marvell SOC design groups, from floor planning, power grid design, place and route, clock tree synthesis, timing closure, power/signal integrity analysis, to physical verification (DRC/LVS/Antenna).
You will have the opportunity to work on many varieties of challenging designs, i.e. low power and high speed SOCs. You will work closely with frontend and integration team to ensure successful tapeouts.Requirements:
BS/MS in EE/CS with 3+ years of hands-on experience in frontend design integration (synthesis/timing), backend place and route or layout integration. Familiar with physical design methodologies and deep sub-micron technology issues. Familiar with ASIC design flow, Verilog HDL, chip synthesis and timing closure.
Must be programming-minded, write makefile/Tcl/Perl to automate design process and improve efficiency.
Detail oriented, self-motivated team worker, good verbal and written communication skills.
Good understanding of Synopsys suite (Astro, Apollo, JupiterXT, Physical Compiler, IC Compiler), Magma suite (Talus/Blast), or Cadence suite (EDI, SOC Encounter, Nanoroute).
Knowledge on static timing analysis (PrimeTime), EM/IR-Drop/Xtalk analysis (Celtic, PT-SI, Apache, AstroRail, PrimeRail), formal or physical verification (Formality, Verplex/LEC, Calibre, Hercules) a plus.
With competitive compensation and great benefits, you will enjoy our workstyle within an incredible culture. We'll give you all the tools you need to succeed so you can grow and develop with us. For additional information on what it's like to work at Marvell, visit our page.Your Future
Marvell provides a work environment that promotes employee growth and development. We are searching for an individual who wants to grow with the company and will strive to improve performance. If you are driven, personable, and energetic, there will be additional opportunities for you here at Marvell.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.