At Marvell, we believe that infrastructure powers progress. That execution is as essential as innovation. That better collaboration builds better technology. Trusted by the world's leading technology companies for 25 years, we move, store, process and secure the world's data with semiconductor solutions designed for our customers current needs and future ambitions. Through a process of deep collaboration and transparency, we're ultimately changing the way tomorrow's enterprise, cloud, automotive, and carrier architectures transform-for the better.
The data infrastructure that our customers build has never been more critical to our global economy. It's what's keeping the world connected, businesses running, and information flowing. If you're ready to excel, innovate, and truly enjoy your work, apply now for the position detailed below.The Opportunity
Marvell's Optical and Copper Connectivity Business Unit is the industry leading provider of infrastructure solutions to enterprise, data center, service providers, small business, and digital home customers.
The ODSP team is a key part of Optical and Copper Connectivity Business Unit that drives key design wins for 50G-PAM4, 100G-PAM4, up to 800G-PAM4 DSP products.
At Marvell, everyone has an important role to play in changing the way tomorrow's enterprise, cloud, automotive, and carrier architectures transform-for the better.
We move, store, process and secure the world's data with semiconductor solutions designed for our customers current needs and future ambitions.
- RTL coding using Verilog or SystemVerilog
- Perform functional verification of design on block and system level.
- Perform logic synthesis at sub-system or top level for multi-million gate ASIC projects
- Perform RTL Lint, CDC, LEC and design ECO
- Perform STA signoff, timing ECO
- Work with logic design and PnR engineers on logic, timing, power and physical issues.
- Manage schedules and support cross-functional engineering effort.
- Implement, enhance and maintain Synthesis, STA scripts and various automation flows.
- Contribute to the continuous development of IC design flow
- BS/MS in Electrical Engineering/Computer Engineering, or related fields and 5-8 years of experience in digital design with knowledge
- Strong Knowledge of logic synthesis, STA
- Familiarity of ASIC design flow (FrontEnd, DFT, PnR)
- Hand-on experience on any of RTL coding, constraint developing, logic synthesis, timing closure :
- Experiences in commercial implementation tools for logic synthesis (DC, Genus), LEC (Formality, Conformal), STA (PrimeTime, Tempus)
- Strong Programming Skills in Scripting/programming language like PERL/Python, TCL & C/C++, in a Unix type environment.
- Strong problem solving skills, analytical skill.
- Strong written and verbal communication English skills.
- Self-motivated and excited to learn new skills, tools, IP, and design flows.
- Understanding any of these knowledge is a plus:
- Design verification
- SERDES, Data Communication, Communication Standards (IEEE, Ethernet protocols)
- DFT experience
With competitive compensation and great benefits, you will enjoy our workstyle within an incredible culture. We'll give you all the tools you need to succeed so you can grow and develop with us. For additional information on what it's like to work at Marvell, visit our page.Your Future
Marvell provides a work environment that promotes employee growth and development. We are searching for an individual who wants to grow with the company and will strive to improve performance. If you are driven, personable, and energetic, there will be additional opportunities for you here at Marvell.
This role is eligible for our hybrid work model in which you will be able to split time between working from home and on-site in a Marvell office.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.