DFT architecture, coverage analysis, Memory-BIST, ATPG pattern generation, compression at core level, Scan Insertion, SSN architecture, clock architecture, timing simulations, no-timing simulations, occ

synopsys primetime , Tcl, Python, Perl, SI noise analysis, AOCV, MMMC methodologies, timing exceptions, POCV, OCV, clocking methodologies

Azure - AKS, Python, Sql, Github, Docker, Arm

Software Release Management, Shell scripting, Deployment Git, WLAN standards IEEE 802.11, Automation using Python

arm architecture , Usb, DDR, Perl, Pcie, Test Plan, Scripting, Python, Shell Programming, Tcl, Arm core, GIC, SMMU, Dms, verification checks, Arm system IP, verification plan, debug methodology, SoC Verification

monte carlo , python, AI ML, Cadence Virtuoso, Spice Simulator

Ecos, Perl, Python, Tcl, FC PrimeTime, Sta, Design Compiler, CTS, EM, physical signoff, Ir, advanced-node SoCs, congestion optimization, ASIC Physical Design Full-Chip Implementation, MCMM, design closure, low-power implementation, PPA trade-offs, Synopsys ICC2

Apache Flink, Gcp, PostgreSQL, Apache Spark, OLAP, Python