I2c, Python, PCB back-end process, DFA, Logic Analyzers, LPDDR4 5, Buck and Boost PMIC, Oscilloscopes, PCIe interface Gen5 Gen6, LDO Load Switch devices, Dfm, SMBus, DC-DC converters, ONFI interface, Power Analyzers, I3C, NAND memories, PCIe analyzers

C, Python, LabVIEW, Analog Digital and Mixed signal IPs, DMM, Oscilloscopes, Bench Characterization, signal generators, SMUs

Perl, Python, Tcl, Clock domain partitioning, Block and subsystem-level physical design flows, primetime, Power integrity and power-aware physical implementation, Clock gating, Fusion Compiler, Congestion analysis and resolution, Clock tree architecture, Tempus, Cadence Innovus, Skew management, Certus, Synopsys ICC2, Timing closure and constraint management

Python, Tcl, OCV, primetime, Low-Power UPF, SI Crosstalk, CRPR, Cadence Tempus, MMMC, Eco, POCV, SDC Constraints, CPF, AOCV, LVF

Java, Spring Boot, Kafka, Distributed Systems, Web Services, AWS SQS, third-party integrations, asynchronous architectures, REST API design, AWS cloud technologies, unit testing frameworks, RDBMS SQL, Webhooks, messaging technologies