C, Perl, Arm, Python, RISC-V Assembly, digital Verification, Cadence SKILL, Mixed-signal Verification, Uvm, systemverilog, UVM testbench creation

display technologies , Python Programming, Functionality, Bit Depth Color, OS Ecosystems, MIPI DSI-2, Bitstream Verification, Introspect SV series systems, Scaling Processing, FPGA Prototyping, PVT Testing, Frame Buffer, Lab Instrumentation, Pixel Formats, SV UVM, Continuous Integration tools, Low-Level Software

Excel, Python, Ms Word

Unix, Lsf, Jenkins, Git, Shell, Linux, Verilog, Gitlab, Python, Tcl, Synthesis, cdc, Simulation, RTL, make, systemverilog, RDC, UGE, LINT, Low Power, Slurm

C, Embedded C, Perl, Debugging, Python, Tcl, CPU architecture, CPU validation, complex system debug, coherent fabric, bare metal programming, Embedded Operating Systems, CPU uArch

Numpy, Git, Pandas, Pytorch, Version Control Systems, Python, machine learning frameworks, OpenAI’s GPT models, Hugging Face, data processing libraries, prompt engineering

Python, PERL, Debugging, Silicon Validation, analog simulation, silicon bring-up, Analog Circuit Design, noise analysis, stability and compensation, CMOS technology, device mismatch and variation, virtuoso

protocol analyzer , Python, Firmware Development, Silicon bring-up, Debug tools, Oscilloscope, JTAG debugger, Validation, Product characterization, Lab equipment