device physics matching techniques, OPAMP circuits, Oscillators, Cadence Layout tools Virtuoso, Temperature Sensor, ESD Latchup mitigation techniques, VXL compliance, Mentor Graphics verification tools Calibre, analog and mixed-signal layout techniques, Custom Analog Layout, DACs, Bandgaps, Bias Circuits, ADCs, circuit parasitic extraction reduction, LDOs, Physical Verification LVS DRC ERC ANT with Calibre

CMOS, VLE/VXL, Analog Layout, Cadence, DRC/LVS, Mask Design